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CMOS fractional-N synthesizers : design for high spectral purity and monolithic integration / by Bram De Muer, Michiel Steyaert

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Examines the design of monolithic CMOS frequency synthesizers that can attain the highest spectral purity and fast switching with moderate power consumption, namely a DS-controlled fractional-N synthesizer. The authors (KU Leuven) first review the requirements of the frequency synthesizer in the DCS-1800 system, then develop high speed frequency dividers, high speed voltage controlled oscillators (VCOs), and a dual-path phase-locked loop (PLL) filter. The final chapter presents a monolithic 1.8 GHz DS fractional-N PLL frequency synthesizer, which may lead to an inexpensive cellular transceiver solution. Annotation (c)2003 Book News, Inc., Portland, OR (booknews.com).

資料來源: Google Book
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